http://www.xilinx.com/products/zynq-7000/linux.htm
Friday, October 28, 2011
Thursday, October 27, 2011
Wednesday, October 26, 2011
Tuesday, October 25, 2011
COACH
Another project to keep a look out.
Conception d’Architecture sur FPGA par Compilation et
syntH`ese
Architecture Design on FPGA by Compilation and Synthesis
https://www-soc.lip6.fr/trac/coach/export/379/anr/coach.pdf
Conception d’Architecture sur FPGA par Compilation et
syntH`ese
Architecture Design on FPGA by Compilation and Synthesis
https://www-soc.lip6.fr/trac/coach/export/379/anr/coach.pdf
Thursday, October 20, 2011
Wednesday, October 19, 2011
Cool IDEA - Variable SMP Model from Nvidia
Impact Factors
A good site to get updated impact factors.
http://www.scimagojr.com/index.php
E.g for TODAES
http://www.scimagojr.com/journalsearch.php?q=18662&tip=sid&clean=0
http://www.scimagojr.com/index.php
E.g for TODAES
http://www.scimagojr.com/journalsearch.php?q=18662&tip=sid&clean=0
Monday, October 17, 2011
FASTER - FACILITATING ANALYSIS AND SYNTHESIS TECHNOLOGIES FOR EFFECTIVE RECONFIGURATION
FASTER
FACILITATING ANALYSIS AND SYNTHESIS TECHNOLOGIES FOR EFFECTIVE RECONFIGURATION
http://www.fp7-faster.eu/index.html
http://www.hpcwire.com/hpcwire/2011-10-14/maxeler_joins_eu_research_effort_to_boost_fpga_performance.html
A project to keep a look out.
FACILITATING ANALYSIS AND SYNTHESIS TECHNOLOGIES FOR EFFECTIVE RECONFIGURATION
http://www.fp7-faster.eu/index.html
http://www.hpcwire.com/hpcwire/2011-10-14/maxeler_joins_eu_research_effort_to_boost_fpga_performance.html
A project to keep a look out.
Altera joins the ARM+FPGA race :)
http://www.eetimes.com/electronics-news/4229353/Altera-integrates-ARM-processor-in-FPGAs
http://www.altera.com/devices/processor/soc-fpga/proc-soc-fpga.html
http://www.eetimes.com/electronics-news/4229353/Altera-integrates-ARM-processor-in-FPGAs
http://www.altera.com/devices/processor/soc-fpga/proc-soc-fpga.html
Friday, October 14, 2011
Couple of interesting webinars on HLS.
Using High-Level Synthesis and Open Source Imaging Libraries to Streamline ASIC/FPGA IP Developmen
Scaling High-Level Synthesis for Complex Image and Video Processing Designs
Using High-Level Synthesis and Open Source Imaging Libraries to Streamline ASIC/FPGA IP Developmen
Scaling High-Level Synthesis for Complex Image and Video Processing Designs
Some interesting papers from ESWeek 2011
Resource-aware Programming on Tiled Architectures
Symbolic Design Space Exploration for Multi-Mode Reconfigurable Systems
Capacity Metric for Chip Heterogeneous Multiprocessors
A Hybrid Strategy for Mapping Multiple Throughput-constrained Applications on MPSoCs by Amit Kumar Singh, Akash Kumar and Thambipillai Srikanthan
Analysis and Optimization of Fault-Tolerant Task Scheduling on Multiprocessor Embedded Systems
Resource-aware Programming on Tiled Architectures
Symbolic Design Space Exploration for Multi-Mode Reconfigurable Systems
Capacity Metric for Chip Heterogeneous Multiprocessors
A Hybrid Strategy for Mapping Multiple Throughput-constrained Applications on MPSoCs by Amit Kumar Singh, Akash Kumar and Thambipillai Srikanthan
Analysis and Optimization of Fault-Tolerant Task Scheduling on Multiprocessor Embedded Systems
Thursday, October 13, 2011
List of high level synthesis tools
A good listing of high level synthesis tools.
http://stackoverflow.com/questions/5603285/c-to-hardware-compiler-hll-synthesis
http://stackoverflow.com/questions/5603285/c-to-hardware-compiler-hll-synthesis
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