Interesting DAC 2013 Papers

• Memory partitioning for multidimensional arrays in high-level synthesis
• The ITRS design technology and system drivers roadmap: process and status
• Runtime dependency analysis for loop pipelining in high-level synthesis
• On learning-based methods for design-space exploration with high-level synthesis
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Related Work for DSE in HLS

On Learning-Based Methods for Design-Space Exploration
with High-Level Synthesis

http://delivery.acm.org/10.1145/2490000/2488795/a50-liu.pdf?ip=131.155.41.196&acc=ACTIVE%20SERVICE&key=C2716FEBFA981EF12214637723A2BFB946E5CCD26CF057B5&CFID=222938095&CFTOKEN=27113601&__acm__=1370512562_6472454faaf574797c50528a567d9ac9