Thursday, February 2, 2012

Paper to look out for

VALVED DATAFLOW FOR FPGA MEMORY HIERARCHY SYNTHESIS
http://www.icassp2012.com/Papers/ViewPapers.asp?PaperNum=3058

A. Papakonstantinou, Y. Liang, K. Rupnow, D. Chen, “Automated Design Transformation for High Level Synthesis in FCUDA”,
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